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This book is a compilation of recent studies by recognized experts in the field of epitaxial graphene working towards a deep comprehension of growth mechanisms, property engineering, and device processing. The results of investigations published within this book develop cumulative knowledge on matters related to device-quality epaxial graphene on SiC, bringing this material closer to realistic applications.
epitaxial graphene --- copper --- redox reaction --- electrodeposition --- voltammetry --- chronoamperometry --- DFT --- silicon carbide --- Raman spectroscopy --- 2D peak line shape --- G peak --- charge density --- strain --- atomic layer deposition --- high-k insulators --- ion implantation --- Raman --- AFM --- XPS --- graphene --- SiC --- 3C-SiC on Si --- substrate interaction --- carrier concentration --- mobility --- intercalation --- buffer layer --- surface functionalization --- twistronics --- twisted bilayer graphene --- flat band --- epitaxial graphene on SiC --- quasi-free-standing graphene --- monolayer graphene --- high-temperature sublimation --- terahertz optical Hall effect --- free charge carrier properties --- sublimation --- electronic properties --- material engineering --- deposition
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This book is a compilation of recent studies by recognized experts in the field of epitaxial graphene working towards a deep comprehension of growth mechanisms, property engineering, and device processing. The results of investigations published within this book develop cumulative knowledge on matters related to device-quality epaxial graphene on SiC, bringing this material closer to realistic applications.
Technology: general issues --- epitaxial graphene --- copper --- redox reaction --- electrodeposition --- voltammetry --- chronoamperometry --- DFT --- silicon carbide --- Raman spectroscopy --- 2D peak line shape --- G peak --- charge density --- strain --- atomic layer deposition --- high-k insulators --- ion implantation --- Raman --- AFM --- XPS --- graphene --- SiC --- 3C-SiC on Si --- substrate interaction --- carrier concentration --- mobility --- intercalation --- buffer layer --- surface functionalization --- twistronics --- twisted bilayer graphene --- flat band --- epitaxial graphene on SiC --- quasi-free-standing graphene --- monolayer graphene --- high-temperature sublimation --- terahertz optical Hall effect --- free charge carrier properties --- sublimation --- electronic properties --- material engineering --- deposition
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Flash memory devices have represented a breakthrough in storage since their inception in the mid-1980s, and innovation is still ongoing. The peculiarity of such technology is an inherent flexibility in terms of performance and integration density according to the architecture devised for integration. The NOR Flash technology is still the workhorse of many code storage applications in the embedded world, ranging from microcontrollers for automotive environment to IoT smart devices. Their usage is also forecasted to be fundamental in emerging AI edge scenario. On the contrary, when massive data storage is required, NAND Flash memories are necessary to have in a system. You can find NAND Flash in USB sticks, cards, but most of all in Solid-State Drives (SSDs). Since SSDs are extremely demanding in terms of storage capacity, they fueled a new wave of innovation, namely the 3D architecture. Today “3D” means that multiple layers of memory cells are manufactured within the same piece of silicon, easily reaching a terabit capacity. So far, Flash architectures have always been based on "floating gate," where the information is stored by injecting electrons in a piece of polysilicon surrounded by oxide. On the contrary, emerging concepts are based on "charge trap" cells. In summary, flash memory devices represent the largest landscape of storage devices, and we expect more advancements in the coming years. This will require a lot of innovation in process technology, materials, circuit design, flash management algorithms, Error Correction Code and, finally, system co-design for new applications such as AI and security enforcement.
Technology: general issues --- retention characteristic --- high-κ --- nonvolatile charge-trapping memory --- stack engineering --- NOR flash memory --- aluminum oxide --- NAND flash memory --- interference --- Technology Computer Aided Design (TCAD) simulation --- disturbance --- program --- non-volatile memory (NVM) --- 3D NAND Flash memories --- random telegraph noise --- Flash memory reliability --- test platform --- endurance --- support vector machine --- raw bit error --- 3D NAND Flash --- RBER --- reliability --- flash signal processing --- randomization scheme --- solid-state drives --- 3D flash memory --- performance cliff --- tail latency --- garbage collection --- artificial neural network --- error correction code --- work function --- effective work function --- dipole --- metal gate --- high-k --- SiO2 --- interfacial reaction --- MHONOS --- erase performance --- 3D NAND flash memory --- temperature --- read disturb --- n/a
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Flash memory devices have represented a breakthrough in storage since their inception in the mid-1980s, and innovation is still ongoing. The peculiarity of such technology is an inherent flexibility in terms of performance and integration density according to the architecture devised for integration. The NOR Flash technology is still the workhorse of many code storage applications in the embedded world, ranging from microcontrollers for automotive environment to IoT smart devices. Their usage is also forecasted to be fundamental in emerging AI edge scenario. On the contrary, when massive data storage is required, NAND Flash memories are necessary to have in a system. You can find NAND Flash in USB sticks, cards, but most of all in Solid-State Drives (SSDs). Since SSDs are extremely demanding in terms of storage capacity, they fueled a new wave of innovation, namely the 3D architecture. Today “3D” means that multiple layers of memory cells are manufactured within the same piece of silicon, easily reaching a terabit capacity. So far, Flash architectures have always been based on "floating gate," where the information is stored by injecting electrons in a piece of polysilicon surrounded by oxide. On the contrary, emerging concepts are based on "charge trap" cells. In summary, flash memory devices represent the largest landscape of storage devices, and we expect more advancements in the coming years. This will require a lot of innovation in process technology, materials, circuit design, flash management algorithms, Error Correction Code and, finally, system co-design for new applications such as AI and security enforcement.
retention characteristic --- high-κ --- nonvolatile charge-trapping memory --- stack engineering --- NOR flash memory --- aluminum oxide --- NAND flash memory --- interference --- Technology Computer Aided Design (TCAD) simulation --- disturbance --- program --- non-volatile memory (NVM) --- 3D NAND Flash memories --- random telegraph noise --- Flash memory reliability --- test platform --- endurance --- support vector machine --- raw bit error --- 3D NAND Flash --- RBER --- reliability --- flash signal processing --- randomization scheme --- solid-state drives --- 3D flash memory --- performance cliff --- tail latency --- garbage collection --- artificial neural network --- error correction code --- work function --- effective work function --- dipole --- metal gate --- high-k --- SiO2 --- interfacial reaction --- MHONOS --- erase performance --- 3D NAND flash memory --- temperature --- read disturb --- n/a
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Flash memory devices have represented a breakthrough in storage since their inception in the mid-1980s, and innovation is still ongoing. The peculiarity of such technology is an inherent flexibility in terms of performance and integration density according to the architecture devised for integration. The NOR Flash technology is still the workhorse of many code storage applications in the embedded world, ranging from microcontrollers for automotive environment to IoT smart devices. Their usage is also forecasted to be fundamental in emerging AI edge scenario. On the contrary, when massive data storage is required, NAND Flash memories are necessary to have in a system. You can find NAND Flash in USB sticks, cards, but most of all in Solid-State Drives (SSDs). Since SSDs are extremely demanding in terms of storage capacity, they fueled a new wave of innovation, namely the 3D architecture. Today “3D” means that multiple layers of memory cells are manufactured within the same piece of silicon, easily reaching a terabit capacity. So far, Flash architectures have always been based on "floating gate," where the information is stored by injecting electrons in a piece of polysilicon surrounded by oxide. On the contrary, emerging concepts are based on "charge trap" cells. In summary, flash memory devices represent the largest landscape of storage devices, and we expect more advancements in the coming years. This will require a lot of innovation in process technology, materials, circuit design, flash management algorithms, Error Correction Code and, finally, system co-design for new applications such as AI and security enforcement.
Technology: general issues --- retention characteristic --- high-κ --- nonvolatile charge-trapping memory --- stack engineering --- NOR flash memory --- aluminum oxide --- NAND flash memory --- interference --- Technology Computer Aided Design (TCAD) simulation --- disturbance --- program --- non-volatile memory (NVM) --- 3D NAND Flash memories --- random telegraph noise --- Flash memory reliability --- test platform --- endurance --- support vector machine --- raw bit error --- 3D NAND Flash --- RBER --- reliability --- flash signal processing --- randomization scheme --- solid-state drives --- 3D flash memory --- performance cliff --- tail latency --- garbage collection --- artificial neural network --- error correction code --- work function --- effective work function --- dipole --- metal gate --- high-k --- SiO2 --- interfacial reaction --- MHONOS --- erase performance --- 3D NAND flash memory --- temperature --- read disturb
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This book is a compilation of recent studies by recognized experts in the field of epitaxial graphene working towards a deep comprehension of growth mechanisms, property engineering, and device processing. The results of investigations published within this book develop cumulative knowledge on matters related to device-quality epaxial graphene on SiC, bringing this material closer to realistic applications.
Technology: general issues --- epitaxial graphene --- copper --- redox reaction --- electrodeposition --- voltammetry --- chronoamperometry --- DFT --- silicon carbide --- Raman spectroscopy --- 2D peak line shape --- G peak --- charge density --- strain --- atomic layer deposition --- high-k insulators --- ion implantation --- Raman --- AFM --- XPS --- graphene --- SiC --- 3C-SiC on Si --- substrate interaction --- carrier concentration --- mobility --- intercalation --- buffer layer --- surface functionalization --- twistronics --- twisted bilayer graphene --- flat band --- epitaxial graphene on SiC --- quasi-free-standing graphene --- monolayer graphene --- high-temperature sublimation --- terahertz optical Hall effect --- free charge carrier properties --- sublimation --- electronic properties --- material engineering --- deposition
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Ferroic materials, including ferroelectric, piezoelectric, magnetic, and multiferroic materials, are receiving great scientific attention due to their rich physical properties. They have shown their great advantages in diverse fields of application, such as information storage, sensor/actuator/transducers, energy harvesters/storage, and even environmental pollution control. At present, ferroic nanostructures have been widely acknowledged to advance and improve currently existing electronic devices as well as to develop future ones. This Special Issue covers the characterization of crystal and microstructure, the design and tailoring of ferro/piezo/dielectric, magnetic, and multiferroic properties, and the presentation of related applications. These papers present various kinds of nanomaterials, such as ferroelectric/piezoelectric thin films, dielectric storage thin film, dielectric gate layer, and magnonic metamaterials. These nanomaterials are expected to have applications in ferroelectric non-volatile memory, ferroelectric tunneling junction memory, energy-storage pulsed-power capacitors, metal oxide semiconductor field-effect-transistor devices, humidity sensors, environmental pollutant remediation, and spin-wave devices. The purpose of this Special Issue is to communicate the recent developments in research on nanoscale ferroic materials.
Research & information: general --- Physics --- PMN-PT thin films --- preferred orientation --- ferroelectric property --- dielectric property --- flexible --- film capacitor --- Ba0.5Sr0.5TiO3/0.4BiFeO3-0.6SrTiO3 --- energy storage properties --- MOS capacitors --- Sm2O3 high-k gate dielectric --- atomic layer deposition --- conduction mechanisms --- interface state density --- BSFM --- phase transition --- aging --- electrical properties --- BiOCl/NaNbO3 --- heterojunction --- piezocatalysis --- photocatalysis --- degradation --- humidity sensing --- impedance-type sensors --- organometallic halide perovskite --- HZO --- PEALD --- ferroelectric memory --- deposition temperature --- film density --- remanent polarization --- fatigue endurance --- CBTi-BFO --- fine grain --- electric breakdown strength --- recoverable energy storage --- spin waves --- Dzyaloshinskii–Moriya interaction --- ferromagnetism --- spintronics --- two-dimensional materials --- ferroelectric properties --- scanning probe microscope --- negative piezoelectricity --- phase segregation --- multiferroic materials --- anisotropy --- DyFeO3 --- magnetoelectric coupling --- pulsed high magnetic field --- DM interaction --- crystalline YFeO3 --- magnetic properties --- enhanced weak ferromagnetism --- exchange interactions
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What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of ten years ago, technological advancements have accelerated to today's FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes after it? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly model future devices. We invite insight from investigators and scientists in the field to showcase their work in this Special Issue with research papers, short communications, and review articles that focus on trends in micro- and nanotechnology from fundamental research to applications.
MOSFET --- n/a --- total ionizing dose (TID) --- low power consumption --- process simulation --- two-dimensional material --- negative-capacitance --- power consumption --- technology computer aided design (TCAD) --- thin-film transistors (TFTs) --- band-to-band tunneling (BTBT) --- nanowires --- inversion channel --- metal oxide semiconductor field effect transistor (MOSFET) --- spike-timing-dependent plasticity (STDP) --- field effect transistor --- segregation --- systematic variations --- Sentaurus TCAD --- indium selenide --- nanosheets --- technology computer-aided design (TCAD) --- high-? dielectric --- subthreshold bias range --- statistical variations --- fin field effect transistor (FinFET) --- compact models --- non-equilibrium Green’s function --- etching simulation --- highly miniaturized transistor structure --- compact model --- silicon nanowire --- surface potential --- Silicon-Germanium source/drain (SiGe S/D) --- nanowire --- plasma-aided molecular beam epitaxy (MBE) --- phonon scattering --- mobility --- silicon-on-insulator --- drain engineered --- device simulation --- variability --- semi-floating gate --- synaptic transistor --- neuromorphic system --- theoretical model --- CMOS --- ferroelectrics --- tunnel field-effect transistor (TFET) --- SiGe --- metal gate granularity --- buried channel --- ON-state --- bulk NMOS devices --- ambipolar --- piezoelectrics --- tunnel field effect transistor (TFET) --- FinFETs --- polarization --- field-effect transistor --- line edge roughness --- random discrete dopants --- radiation hardened by design (RHBD) --- low energy --- flux calculation --- doping incorporation --- low voltage --- topography simulation --- MOS devices --- low-frequency noise --- high-k --- layout --- level set --- process variations --- subthreshold --- metal gate stack --- electrostatic discharge (ESD) --- non-equilibrium Green's function
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