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Field-effect transistors --- Unipolar transistors --- Transistors --- Field-effect transistors. --- FETs (Transistors)

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The world-wide proliferation of cellular networks has revolutionizedtelecommunication systems. The transition from Analog to Digital RFtechnology enabled substantial increase in voice traffic usingavailable spectrum, and subsequently the delivery of digitally basedtext messaging, graphics and even streaming video.

Metal oxide semiconductor field-effect transistors. --- Field-effect transistors. --- FETs (Transistors) --- Unipolar transistors --- Transistors --- MOSFET --- Field-effect transistors --- Metal oxide semiconductors

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Field-effect transistors --- Transistor circuits --- Transistors à effet de champ --- Circuits transistorisés --- 621.382.3 --- Electronic circuits --- Transistors --- Unipolar transistors --- 621.382.3 Transistors --- Transistors à effet de champ --- Circuits transistorisés --- FETs (Transistors)

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This book discusses analytical approaches and modeling of the breakdown voltage (BV) effects on graphene-based transistors. It presents semi-analytical models for lateral electric field, length of velocity saturation region (LVSR), ionization coefficient (α), and breakdown voltage (BV) of single and double-gate graphene nanoribbon field effect transistors (GNRFETs). The application of Gauss’s law at drain and source regions is employed in order to derive surface potential and lateral electric field equations. LVSR is then calculated as a solution of surface potential at saturation condition. The ionization coefficient is modelled and calculated by deriving equations for probability of collisions in ballistic and drift modes based on the lucky drift theory of ionization. The threshold energy of ionization is computed using simulation and an empirical equation is derived semi-analytically. Lastly avalanche breakdown condition is employed to calculate the lateral BV. On the basis of this, simple analytical and semi-analytical models are proposed for the LVSR and BV, which could be used in the design and optimization of semiconductor devices and sensors. The proposed equations are used to examine BV at different channel lengths, supply voltages, oxide thickness, GNR widths, and gate voltages. Simulation results show that the operating voltage of FETs could be as low as 0.25 V in order to prevent breakdown. However, after optimization, it can go as high as 1.5 V. This work is useful for researchers working in the area of graphene nanoribbon-based transistors.

Engineering. --- Electronic circuits. --- Nanotechnology. --- Nanotechnology and Microengineering. --- Electronic Circuits and Devices. --- Field-effect transistors --- Materials. --- Unipolar transistors --- Transistors --- Molecular technology --- Nanoscale technology --- High technology --- Construction --- Industrial arts --- Technology --- FETs (Transistors) --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics

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This book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adopt a radiation event generator tool (MUSCA SEP3), which deals both with layout features and electrical properties of devices. The authors also explore four circuit-level techniques (e.g. transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells. This book also evaluates the mitigation tendency when different levels of process variation, transistor sizing, and radiation particle characteristics are applied in the design. An overall comparison of all methods addressed by this work is provided allowing to trace a trade-off between the reliability gains and the design penalties of each approach regarding the area, performance, power consumption, single event transient (SET) pulse width, and SET cross-section. Explains how to measure the influence of process variability (e.g. work-function fluctuations) and radiation-induced soft errors in FinFET logic cells; Enables designers to improve the robustness of FinFET integrated circuits without focusing on manufacturing adjustments; Discusses the benefits and downsides of using circuit-level approaches such as transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor for mitigating the impact of process variability and soft errors; Evaluates the techniques described in the context of different test scenarios: distinct levels of process variations, transistor sizing, and different radiation features; Helps readers identify the best circuit design considering the target application and design requirements like area constraints or power/delay limitations.

Electronic circuits. --- Circuits and Systems. --- Electronic Circuits and Devices. --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Field-effect transistors --- Soft errors (Computer science) --- Design and construction. --- Reliability. --- Computer science --- Errors --- FETs (Transistors) --- Unipolar transistors --- Transistors