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This contributed book provides a thorough understanding of the basics along with detailed state-of-the-art emerging interconnect technologies for integrated circuit design and flexible electronics. It focuses on the investigation of advanced on-chip interconnects which match the current as well as future technology requirements. The contents focus on different aspects of interconnects such as material, physical characteristics, parasitic extraction, design, structure, modeling, machine learning, and neural network-based models for interconnects, signaling schemes, varying signal integrity performance analysis, variability, reliability aspects, associated electronic design automation tools. The book also explores interconnect technologies for flexible electronic systems. It also highlights the integration of sensors with stretchable interconnects to demonstrate the concept of a stretchable sensing network for wearable and flexible applications. This book is a useful guide for those working in academia and industry to understand the fundamentals and application of interconnect technologies.

Electronic circuits. --- Telecommunication. --- Electronic Circuits and Systems. --- Communications Engineering, Networks.

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Das Buch liefert das physikalische Know-how bei der Planung und Berechnung von elektrischen Netzen in Bezug auf transiente Schalt- und Netzvorgänge. Es hilft zum Verständnis und sinnvollen Einsatz der eingesetzten Software bei der Durchführung von Netzsimulationen. Zur Grundlage werden dabei Beispiele aus der Praxis gelegt. Ausgehend von der Darstellung der Betriebsmittel, werden die unterschiedlichen Netzvorgänge dargestellt: Ausbreitung von Wanderwellen, Ein- und Ausschaltvorgänge in Netzen, Eintreten von Kurzschlüssen und Ferroresonanzen sowie das Verhalten von Schaltgeräten. Der Inhalt Darstellung der Betriebsmittel.- Drehstromsystem und Komponenten.- Wanderwellenverfahren.- Kurzschlüsse.- Einschalt- und Ausschaltvorgänge.- Verhalten von Schaltgeräten, Ferroresonanzen. Die Zielgruppen Das Werk richtet sich an Ingenieure in der Elektrischen Energieversorgung. Die Autoren Gerd Balzer, studierte Elektrische Energietechnik und promovierte zum Dr.-Ing. an der Technische Hochschule in Darmstadt. Anschließend war er 17 Jahre Mitarbeiter der BBC/ABB, Mannheim und Leiter der Abteilung „Elektroberatung". Von 1994 bis 2011war er Professor für Elektrische Energieversorgung an der Technischen Universität in Darmstadt mit den Arbeitsgebieten: Asset Management, Netzplanung, Isolationskoordination. Claus Neumann, studierte Elektrische Energietechnik an der RWTH Aachen. Anschließend war er Versuchsingenieur im Hochspannungslabor eines Schaltanlagenherstellers. Von 1979 bis 2010 war er in verschiedenen Positionen auf dem Gebiet Hochspannungsgeräte und -Systeme bei RWE und zuletzt beim Übertragungsnetzbetreiber Amprion als Leiter “Operatives Asset Management” tätig. Er promovierte an der TH Darmstadt und ist dort Honorarprofessor für das Fach “Hoch-spannungsgeräte und -anlagen”.

Electronic circuits. --- Energy systems. --- Circuits and Systems. --- Energy Systems.

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The development of computing machines found great success in the last decades. But the ongoing miniaturization of integrated circuits will reach its limits in the near future. Shrinking transistor sizes and power dissipation are the major barriers in the development of smaller and more powerful circuits. Reversible logic provides an alternative that may overcome many of these problems in the future. For low-power design, reversible logic offers significant advantages since zero power dissipation will only be possible if computation is reversible. Furthermore, quantum computation profits from enhancements in this area, because every quantum circuit is inherently reversible and thus requires reversible descriptions. However, since reversible logic is subject to certain restrictions (e.g. fanout and feedback are not directly allowed), the design of reversible circuits significantly differs from the design of traditional circuits. Nearly all steps in the design flow (like synthesis, verification, or debugging) must be redeveloped so that they become applicable to reversible circuits as well. But research in reversible logic is still at the beginning. No continuous design flow exists so far. In Towards a Design Flow for Reversible Logic, contributions to a design flow for reversible logic are presented. This includes advanced methods for synthesis, optimization, verification, and debugging. Formal methods like Boolean satisfiability and decision diagrams are thereby exploited. By combining the techniques proposed in the book, it is possible to synthesize reversible circuits representing large functions. Optimization approaches ensure that the resulting circuits are of small cost. Finally, a method for equivalence checking and automatic debugging allows to verify the obtained results and helps to accelerate the search for bugs in case of errors in the design. Combining the respective approaches, a first design flow for reversible circuits of significant size results.

Engineering. --- Circuits and Systems. --- Systems engineering. --- Ingénierie --- Ingénierie des systèmes --- Computer architecture. --- Computer logic. --- Logic programming.

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This book summarizes the landscape of cache replacement policies for CPU data caches. The emphasis is on algorithmic issues, so the authors start by defining a taxonomy that places previous policies into two broad categories, which they refer to as coarse-grained and fine-grained policies. Each of these categories is then divided into three subcategories that describe different approaches to solving the cache replacement problem, along with summaries of significant work in each category. Richer factors, including solutions that optimize for metrics beyond cache miss rates, that are tailored to multi-core settings, that consider interactions with prefetchers, and that consider new memory technologies, are then explored. The book concludes by discussing trends and challenges for future work. This book, which assumes that readers will have a basic understanding of computer architecture and caches, will be useful to academics and practitioners across the field.

Electronic circuits. --- Microprocessors. --- Computer architecture. --- Electronic Circuits and Systems. --- Processor Architectures.

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This book introduces readers to emerging persistent memory (PM) technologies that promise the performance of dynamic random-access memory (DRAM) with the durability of traditional storage media, such as hard disks and solid-state drives (SSDs). Persistent memories (PMs), such as Intel's Optane DC persistent memories, are commercially available today. Unlike traditional storage devices, PMs can be accessed over a byte-addressable load-store interface with access latency that is comparable to DRAM. Unfortunately, existing hardware and software systems are ill-equipped to fully avail the potential of these byte-addressable memory technologies as they have been designed to access traditional storage media over a block-based interface. Several mechanisms have been explored in the research literature over the past decade to design hardware and software systems that provide high-performance access to PMs.Because PMs are durable, they can retain data across failures, such as power failures and program crashes. Upon a failure, recovery mechanisms may inspect PM data, reconstruct state and resume program execution. Correct recovery of data requires that operations to the PM are properly ordered during normal program execution. Memory persistency models define the order in which memory operations are performed at the PM. Much like memory consistency models, memory persistency models may be relaxed to improve application performance. Several proposals have emerged recently to design memory persistency models for hardware and software systems and for high-level programming languages. These proposals differ in several key aspects; they relax PM ordering constraints, introduce varying programmability burden, and introduce differing granularity of failure atomicity for PM operations.This primer provides a detailed overview of the various classes of the memory persistency models, their implementations in hardware, programming languages and software systems proposed in the recent research literature, and the PM ordering techniques employed by modern processors.

Electronic circuits. --- Microprocessors. --- Computer architecture. --- Electronic Circuits and Systems. --- Processor Architectures.