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Book
Les nanotechnologies
Author:
ISBN: 9782715402461 2715402465 Year: 2022 Publisher: Paris : Presses Universitaires de France,

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Abstract

Imaginez que l'on puisse manipuler des matériaux à l'échelle moléculaire et atomique : une technologie de l'infiniment petit permettrait d'exploiter des propriétés nouvelles de la matière, qui ne se manifestent pas à notre échelle macroscopique. Tel est le défi des nanotechnologies, dont les développements invitent à la créativité et à l'innovation.En un quart de siècle, les nanotechnologies ont conquis presque tous les domaines des sciences et des techniques. Elles ont transformé en profondeur les technologies de l'information, l'intelligence artificielle, la médecine, l'industrie pharmaceutique ou encore la chimie, et investissent à présent les technologies quantiques. Cet essor est intimement lié aux révolutions technologiques engendrées par la microélectronique, et par la nanoélectronique qui en a découlé.Jean-Michel Sallese revient sur cette histoire qui se déroule sous nos yeux et les découvertes qui la rythment, et nous montre que cette technologie fascinante, en constante évolution, est porteuse de nombreuses promesses pour les générations futures.


Book
Les Nanotechnologies
Author:
ISBN: 2715402481 Year: 2022 Publisher: Paris : Presses Universitaires de France,

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Abstract

«Imaginez que l'on puisse manipuler des matériaux à l'échelle moléculaire et atomique : une technologie de l'infiniment petit permettrait d'exploiter des propriétés nouvelles de la matière, qui ne se manifestent pas à notre échelle macroscopique. Tel est le défi des nanotechnologies, dont les développements invitent à la créativité et à l'innovation. En un quart de siècle, les nanotechnologies ont conquis presque tous les domaines des sciences et des techniques. Elles ont transformé en profondeur les technologies de l'information, l'intelligence artificielle, la médecine, l'industrie pharmaceutique ou encore la chimie, et investissent à présent les technologies quantiques. Cet essor est intimement lié aux révolutions technologiques engendrées par la microélectronique, et par la nanoélectronique qui en a découlé. Jean-Michel Sallese revient sur cette histoire qui se déroule sous nos yeux et les découvertes qui la rythment, et nous montre que cette technologie fascinante, en constante évolution, est porteuse de nombreuses promesses pour les générations futures."--Site Web de l'éditeur.

Keywords

Nanotechnology.


Book
Modeling nanowire and double-gate junctionless field-effect transistors
Authors: ---
ISBN: 1108581390 1316676897 1108557538 Year: 2018 Publisher: Cambridge : Cambridge University Press,

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Abstract

The first book on the topic, this is a comprehensive introduction to the modeling and design of junctionless field effect transistors (FETs). Beginning with a discussion of the advantages and limitations of the technology, the authors also provide a thorough overview of published analytical models for double-gate and nanowire configurations, before offering a general introduction to the EPFL charge-based model of junctionless FETs. Important features are introduced gradually, including nanowire versus double-gate equivalence, technological design space, junctionless FET performances, short channel effects, transcapacitances, asymmetric operation, thermal noise, interface traps, and the junction FET. Additional features compatible with biosensor applications are also discussed. This is a valuable resource for students and researchers looking to understand more about this new and fast developing field.


Book
Parasitic Substrate Coupling in High Voltage Integrated Circuits : Minority and Majority Carriers Propagation in Semiconductor Substrate
Authors: --- --- ---
ISBN: 3319743821 3319743813 Year: 2018 Publisher: Cham : Springer International Publishing : Imprint: Springer,

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Abstract

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific test protections.


Digital
Parasitic Substrate Coupling in High Voltage Integrated Circuits : Minority and Majority Carriers Propagation in Semiconductor Substrate
Authors: --- --- ---
ISBN: 9783319743820 Year: 2018 Publisher: Cham Springer International Publishing

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Abstract

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific test protections.

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