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"Ultra High Performance Concrete (UHPC) is characterized by a very high compressive strength which may reach more than 200 MPa. The behavior of this material under tension and compression actions has been established to be very brittle in nature. Discontinuous fibers (normally steel fibers) are usually added to the UHPC mix to introduce ductility. In order to investigate the beneficial effects of using fiber reinforced UHPC in structural members subjected to torsion, a series of experimental tests on 17 UHPC beams subjected to pure torsion were carried out. The test beams consisted of plain UHPC beams, UHPC beams reinforced with steel fibers only, UHPC reinforced with steel fibers and different combinations of traditional longitudinal and transverse reinforcement. The plain UHPC beams showed very brittle behavior, whereas the UHPC beams with steel fibers only showed a post cracking ductile behavior. The addition of little steel fiber volume (e.g. 0.5 %) to the plain UHPC beams enhanced the ductility. The enhancement at the ultimate capacity amounts to about 20 %. Meanwhile, the steel fibers with 0.9 % by volume showed much enhanced ductility and a maximum enhancement of the torsional carrying capacity up to 32 %. The addition of moderate steel fiber volume (e.g. 0.9 %) to one type of traditional reinforcement (either longitudinal or transverse) accomplished an effective post cracking torsional carrying mechanism. The steel fibers shows a tendency to replace the missing type of traditional reinforcement, however this should be confirmed by more tests and by using higher steel fiber volumes. A series of experimental tests on fiber reinforced UHPC prisms to investigate the post cracking shear strength and stiffness of the used UHPC mix (e.g. M3Q) was conducted. The results of these tests revealed that this fine grained UHPC mix has a weak post cracking shear behavior. The results of these tests were used later in the Finite Element (F.E) model. An analytical model based on the well known thin-walled tube analogy was developed in order to estimate the torsional carrying capacity of beams under pure torsion having different combinations of steel fibers and traditional reinforcement. The comparison between the test and model results showed very good agreement for all cases. A finite element model based on calibrated small scale tests was developed using ATENA F.E. package to predict the full load-deformation behavior of the test beams. The predictions of the model show very good agreement with the test results."-- Provided by publisher.

Elastic plates and shells. --- Torsion. --- Wave-motion, Theory of.

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Adaptive Techniques for Mixed Signal System on Chip discusses the concept of adaptation in the context of analog and mixed signal design along with different adaptive architectures used to control any system parameter. The first part of the book gives an overview of the different elements that are normally used in adaptive designs including tunable elements as well as voltage, current, and time references with an emphasis on the circuit design of specific blocks such as voltage-controlled transconductors, offset comparators, and a novel technique for accurate implementation of on chip resistors. While the first part of the book addresses adaptive techniques at the circuit and block levels, the second part discusses adaptive equalization architectures employed to minimize the impact of ISI (Intersymbol Interference) on the quality of received data in high-speed wire line transceivers. It presents the implementation of a 125Mbps transceiver operating over a variable length of Category 5 (CAT-5) Ethernet cable as an example of adaptive equalizers.

Mixed signal circuits. --- Systems on a chip. --- Circuits, Mixed signal --- Mixed analog-digital integrated circuits --- Mixed mode integrated circuits --- Integrated circuits --- SOC design --- Systems on chip --- Embedded computer systems --- Systems engineering. --- Computer engineering. --- Engineering design. --- Electronics. --- Telecommunication. --- Circuits and Systems. --- Electrical Engineering. --- Engineering Design. --- Electronics and Microelectronics, Instrumentation. --- Communications Engineering, Networks. --- Electric communication --- Mass communication --- Telecom --- Telecommunication industry --- Telecommunications --- Communication --- Information theory --- Telecommuting --- Electrical engineering --- Physical sciences --- Design, Engineering --- Engineering --- Industrial design --- Strains and stresses --- Computers --- Engineering systems --- System engineering --- Industrial engineering --- System analysis --- Design --- Design and construction --- Electronic circuits. --- Electrical engineering. --- Microelectronics. --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Microminiature electronic equipment --- Microminiaturization (Electronics) --- Microtechnology --- Semiconductors --- Miniature electronic equipment --- Electric engineering

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This book deals with the subject matter of power management integrated circuit (IC) design, or integrated power electronics, as a response to the growing need for energy-efficient electronics. The authors introduce various power management IC design techniques to build future energy-efficient “green” electronics. The goal is to achieve high efficiency, which is essential to meet consumers’ growing need for longer battery lives.  The focus is to study topologies amiable for full on-chip implementation (few external components) in the mainstream CMOS technology, which will reduce the physical size and the manufacturing cost of the devices. Describes a number of  techniques at circuits and systems level that increase sleep-mode efficiency to prolong the battery life, without sacrificing performance parameters; Enables readers to design for compactness, which requires fewer bulky external components and circuit topologies that lend themselves easily to full on-chip integration; Offers insights on how the efficiency boosting techniques for power management IC designs work toward society’s quest for higher energy efficiency.        .

Low voltage integrated circuits -- Design and construction. --- Metal oxide semiconductors, Complementary. --- Low voltage integrated circuits --- Metal oxide semiconductors, Complementary --- Electrical & Computer Engineering --- Engineering & Applied Sciences --- Electrical Engineering --- Design and construction --- Electric circuits. --- Circuits, Electric --- Engineering. --- Electronics. --- Microelectronics. --- Electronic circuits. --- Power electronics. --- Circuits and Systems. --- Electronics and Microelectronics, Instrumentation. --- Power Electronics, Electrical Machines and Networks. --- Electronics, Power --- Electric power --- Electronics --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Microminiature electronic equipment --- Microminiaturization (Electronics) --- Microtechnology --- Semiconductors --- Miniature electronic equipment --- Electrical engineering --- Physical sciences --- Construction --- Industrial arts --- Technology --- Electric lines --- Systems engineering. --- Production of electric energy or. --- Engineering systems --- System engineering --- Engineering --- Industrial engineering --- System analysis

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CMOS PLLs and VCOs for 4G Wireless is the first book devoted to the subject of CMOS PLL and VCO design for future broadband 4th generation wireless devices. These devices will be handheld-centric, requiring very low power consumption and small footprint. They will be able to work across multiple bands and multiple standards covering WWAN (GSM,WCDMA) ,WLAN(802.11 a/b/g) and WPAN(Bluetooth) with different modulations, channel bandwidths , phase noise requirements ,etc. As such, this book discusses design, modeling and optimization techniques for low power fully integrated broadband PLLs and VCOs in deep submicron CMOS. First, the PLL and VCO performances are studied in the context of the chosen multi-band multi-standard, radio architecture and the adopted frequency plan. Next a thorough study of the design requirements for broadband PLL/VCO design is conducted together with modeling techniques for noise sources in a PLL and VCO focusing on optimization of integrated phase noise for multi-carrier OFDM 64-QAM type applications. Design examples for multi-standard 802.111a/b/g as well as for GSM/WCDMA are fully described and experimental results from 0.18 micron CMOS test chips have demonstrated the validity of the proposed design and optimization techniques. Equally important the work describes techniques for robust high volume production of RF radios in general and for integrated PLL/VCO design in particular including issues such as supply sensitivity, ground bounce and calibration mechanisms. CMOS PLLS and VCOs for 4G Wireless will be of interest to graduate students in electrical and computer engineering, design managers and RFIC designers in wireless semiconductor companies.

Metal oxide semiconductors, Complementary. --- Phase-locked loops. --- Voltage-controlled oscillators --- Wireless communication systems. --- Design and construction. --- Electronics. --- Systems engineering. --- Computer engineering. --- Electronics and Microelectronics, Instrumentation. --- Circuits and Systems. --- Electrical Engineering. --- Microelectronics. --- Electronic circuits. --- Electrical engineering. --- Electric engineering --- Engineering --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Microminiature electronic equipment --- Microminiaturization (Electronics) --- Microtechnology --- Semiconductors --- Miniature electronic equipment --- Electrical engineering --- Physical sciences --- Engineering. --- Construction --- Industrial arts --- Technology

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Integrated circuits --- Neural computers --- Neural computers --- Very large scale integration --- Congresses. --- Circuits --- Congresses. --- Congresses.