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Book
Computer architecture performance evaluation methods
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ISBN: 1608454673 9781608454679 9781608454686 1608454681 Year: 2010 Publisher: [United States] : Morgan & Claypool,

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Abstract

Performance evaluation is at the foundation of computer architecture research and development. Contemporary microprocessors are so complex that architects cannot design systems based on intuition and simple models only. Adequate performance evaluation methods are absolutely crucial to steer the research and development process in the right direction. However, rigorous performance evaluation is non-trivial as there are multiple aspects to performance evaluation, such as picking workloads, selecting an appropriate modeling or simulation approach, running the model and interpreting the results using meaningful metrics. Each of these aspects is equally important and a performance evaluation method that lacks rigor in any of these crucial aspects may lead to inaccurate performance data and may drive research and development in a wrong direction. The goal of this book is to present an overview of the current state-of-the-art in computer architecture performance evaluation, with a special emphasis on methods for exploring processor architectures. The book focuses on fundamental concepts and ideas for obtaining accurate performance data. The book covers various topics in performance evaluation, ranging from performance metrics, to workload selection, to various modeling approaches including mechanistic and empirical modeling. And because simulation is by far the most prevalent modeling technique, more than half the book's content is devoted to simulation. The book provides an overview of the simulation techniques in the computer designer's toolbox, followed by various simulation acceleration techniques including sampled simulation, statistical simulation, parallel simulation and hardware-accelerated simulation.


Book
Computer Architecture Performance Evaluation Methods
Author:
ISBN: 3031017277 3031005996 9783031017278 Year: 2010 Publisher: Cham : Springer International Publishing : Imprint: Springer,

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Abstract

Performance evaluation is at the foundation of computer architecture research and development. Contemporary microprocessors are so complex that architects cannot design systems based on intuition and simple models only. Adequate performance evaluation methods are absolutely crucial to steer the research and development process in the right direction. However, rigorous performance evaluation is non-trivial as there are multiple aspects to performance evaluation, such as picking workloads, selecting an appropriate modeling or simulation approach, running the model and interpreting the results using meaningful metrics. Each of these aspects is equally important and a performance evaluation method that lacks rigor in any of these crucial aspects may lead to inaccurate performance data and may drive research and development in a wrong direction. The goal of this book is to present an overview of the current state-of-the-art in computer architecture performance evaluation, with a special emphasis on methods for exploring processor architectures. The book focuses on fundamental concepts and ideas for obtaining accurate performance data. The book covers various topics in performance evaluation, ranging from performance metrics, to workload selection, to various modeling approaches including mechanistic and empirical modeling. And because simulation is by far the most prevalent modeling technique, more than half the book's content is devoted to simulation. The book provides an overview of the simulation techniques in the computer designer's toolbox, followed by various simulation acceleration techniques including sampled simulation, statistical simulation, parallel simulation and hardware-accelerated simulation. Table of Contents: Introduction / Performance Metrics / Workload Design / Analytical Performance Modeling / Simulation / Sampled Simulation / Statistical Simulation / Parallel Simulation and Hardware Acceleration / Concluding Remarks.


Dissertation
Studie en modellering op logisch niveau van onderdelen van een blokgestructureerde instructieset-microarchitectuur
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Year: 1998

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Dissertation
Statistische modellering van computerprogramma's
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Year: 2003

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Dissertation
Geheugenparallellisme exploiteren via dynamische optimalisatie
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Year: 2009

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Dissertation
Benchmarking van transactioneel geheugen
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Year: 2009

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Dissertation
Analytische prestatiemodellering van DRAM-geheugen
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Year: 2009

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Dissertation
Nauwkeurige on-the-fly prestatie-analyse van multi-core processors
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Year: 2010

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Dissertation
Simulatie van many-core processors
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Year: 2010

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Dissertation
Evaluatie van DVFS met behulp van synthetische webbenchmarks
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Year: 2012

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