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This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.

Electrical Engineering --- Electrical & Computer Engineering --- Engineering & Applied Sciences --- Embedded computer systems --- Dynamic random access memory. --- Programmable controllers. --- Programming. --- Controllers, Programmable --- DRAM (Dynamic random access memory) --- Electronic controllers --- Automatic control --- Random access memory --- Semiconductor storage devices --- Systems engineering. --- Computer science. --- Electronics. --- Circuits and Systems. --- Processor Architectures. --- Electronics and Microelectronics, Instrumentation. --- Electrical engineering --- Physical sciences --- Informatics --- Science --- Engineering systems --- System engineering --- Engineering --- Industrial engineering --- System analysis --- Design and construction --- Electronic circuits. --- Microprocessors. --- Microelectronics. --- Microminiature electronic equipment --- Microminiaturization (Electronics) --- Electronics --- Microtechnology --- Semiconductors --- Miniature electronic equipment --- Minicomputers --- Electron-tube circuits --- Electric circuits --- Electron tubes