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2004 (5)

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Testing for EMC compliance
Authors: --- --- ---
ISBN: 047143308X 9780471644651 9780471433088 047164465X 1280367997 9786610367993 0470248742 0471644684 Year: 2004 Publisher: Hoboken, New Jersey [Piscataqay, New Jersey] John Wiley IEEE Xplore

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The Keep It Simple (KISS) philosophy is the primary focus of this book. It is written in very simple language with minimal math, as a compilation of helpful EMI troubleshooting hints. Its light-hearted tone is at odds with the extreme seriousness of most engineering reference works that become boring after a few pages. This text tells engineers what to do and how to do it. Only a basic knowledge of math, electronics, and a basic understanding of EMI/EMC are necessary to understand the concepts and circuits described. Once EMC troubleshooting is demystified, readers learn there are quick and simple techniques to solve complicated problems a key aspect of this book. Simple and inexpensive methods to resolve EMI issues are discussed to help generate unique ideas and methods for developing additional diagnostic tools and measurement procedures. An appendix on how to build probes is included. It can be a fun activity, even humorous at times with bizarre techniques (i.e., the sticky finger probe).


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IEEE Std C37.90.2-2004 (Revision of IEEE Std C37.90.2-1995)
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Year: 2004 Publisher: [Place of publication not identified] : IEEE,

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Revision of IEEE Std C37.90.2-1995. Design tests for relay and relay systems that relate to the immunity of this equipment to Radiated Electromagnetic Interference from Transceivers are specified. Field strength, test frequencies, modulation, sweep rates, equipment setup and connection, test procedures, criteria for acceptance, and documentation for test results are described. This standards has been harmonized with IEC standards where consensus could be reached.


Book
IEEE Std C37.90.2-2004 (Revision of IEEE Std C37.90.2-1995)
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Year: 2004 Publisher: [Place of publication not identified] : IEEE,

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Revision of IEEE Std C37.90.2-1995. Design tests for relay and relay systems that relate to the immunity of this equipment to Radiated Electromagnetic Interference from Transceivers are specified. Field strength, test frequencies, modulation, sweep rates, equipment setup and connection, test procedures, criteria for acceptance, and documentation for test results are described. This standards has been harmonized with IEC standards where consensus could be reached.

High-speed circuit board signal integrity
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ISBN: 1580531318 9781580531313 1580538460 9781580538466 Year: 2004 Publisher: Boston Artech House

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As circuit boards are increasingly required to transmit signals at higher and higher speeds, signal and power integrity become increasingly crucial. Rules of thumb that you have used over and over again to prevent signal loss no longer apply to these new, high-speed, high-density circuit designs. This leading-edge circuit design resource offers you the knowledge needed to quickly pinpoint transmission problems that can compromise your entire circuit design. Discussing both design and debug issues at gigabit per second data rates, the book serves as a practical reference for your projects involving high-speed serial signaling on printed wiring boards. Step-by-step, this book goes from reviewing the essentials of linear circuit theory, to examining practical issues of pulse propagation along lossless and lossy transmission lines. It provides detailed guidelines for crosstalk, attenuation, power supply decoupling, and layer stackup tradeoffs (including pad/antipad tradeoffs). Other key topics include the construction of etched conductors, analysis of return paths and split planes, microstrip and stripline characteristics, and SMT capacitors. Filled with on-the-job-proven examples, this hands-on reference is the book that you can turn to time and again to design out and troubleshoot circuit signal loss and impedance problems.

Static crosstalk-noise analysis : for deep sub-micron digital designs
Authors: --- ---
ISBN: 1402080921 1402080913 Year: 2004 Publisher: New York : Kluwer Academic Publishers,

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As the feature size decreases in deep sub-micron designs, coupling capacitance becomes the dominant factor in total capacitance. The resulting crosstalk noise may be responsible for signal integrity issues and significant timing variation. Traditionally, static timing analysis tools have ignored cross coupling effects between wires altogether. Newer tools simply approximate the coupling capacitance by a 2X Miller factor in order to compute the worst case delay. The latter approach not only reduces delay calculation accuracy, but can also be shown to underestimate the delay in certain scenarios. This book describes accurate but conservative methods for computing delay variation due to coupling. Furthermore, most of these methods are computationally efficient enough to be employed in a static timing analysis tool for complex integrated digital circuits. To achieve accuracy, a more accurate computation of the Miller factor is derived. To achieve both computational efficiency and accuracy, a variety of mechanisms for pruning the search space are detailed, including: -Spatial pruning - reducing aggressors to those in physical proximity, -Electrical pruning - reducing aggressors by electrical strength, -Temporal pruning - reducing aggressors using timing windows, -Functional pruning - reducing aggressors by Boolean functional analysis.

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