Narrow your search

Library

KU Leuven (1)

ULB (1)

ULiège (1)


Resource type

book (1)


Language

English (1)


Year
From To Submit

1996 (1)

Listing 1 - 1 of 1
Sort by
Logic synthesis and verification algorithms
Authors: ---
ISBN: 1280200804 9786610200801 0306475928 0792397460 Year: 1996 Publisher: Boston, Massachusetts : Kluwer Academic Publishers,

Loading...
Export citation

Choose an application

Bookmark

Abstract

Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students. Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits). It combines and integrates modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory. The book also provides background material on Boolean algebra and discrete mathematics. A unique feature of this text is the large collection of solved problems. Throughout the text the algorithms covered are the subject of one or more problems based on the use of available synthesis programs.

Listing 1 - 1 of 1
Sort by