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Fundamentals of Digital Manufacturing Science
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ISBN: 9780857295644 Year: 2012 Publisher: London Springer London

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The manufacturing industry will reap significant benefits from encouraging the development of digital manufacturing science and technology. Digital Manufacturing Science uses theorems, illustrations and tables to introduce the definition, theory architecture, main content, and key technologies of digital manufacturing science. Readers will be able to develop an in-depth understanding of the emergence and the development, the theoretical background, and the techniques and methods of digital manufacturing science. Furthermore, they will also be able to use the basic theories and key technologies described in Digital Manufacturing Science to solve practical engineering problems in modern manufacturing processes. Digital Manufacturing Science is aimed at advanced undergraduate and postgraduate students, academic researchers and researchers in the manufacturing industry. It allows readers to integrate the theories and technologies described with their own research works, and to propose new ideas and new methods to improve the theory and application of digital manufacturing science.


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Multi-objective Evolutionary Optimisation for Product Design and Manufacturing
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ISBN: 9780857296528 Year: 2011 Publisher: London Springer London

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With the increasing complexity and dynamism in today's product design and manufacturing, more optimal, robust and practical approaches and systems are needed to support product design and manufacturing activities. Multi-objective Evolutionary Optimisation for Product Design and Manufacturing presents a focused collection of quality chapters on state-of-the-art research efforts in multi-objective evolutionary optimisation, as well as their practical applications to integrated product design and manufacturing. Multi-objective Evolutionary Optimisation for Product Design and Manufacturing consists of two major sections. The first presents a broad-based review of the key areas of research in multi-objective evolutionary optimisation. The second gives in-depth treatments of selected methodologies and systems in intelligent design and integrated manufacturing. Recent developments and innovations in multi-objective evolutionary optimisation make Multi-objective Evolutionary Optimisation for Product Design and Manufacturing a useful text for a broad readership, from academic researchers to practicing engineers.


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Multiprocessor System-on-Chip : Hardware Design and Tool Integration
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ISBN: 9781441964601 Year: 2011 Publisher: New York NY Springer New York

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Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. ¢Provides a state-of-the-art overview of system design using MPSoC architectures; ¢Describes current trends in on-chip communication architectures; ¢Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; ¢Includes coverage of challenges in physical design for multi- and manycore hardware architectures.


Book
Process Variations and Probabilistic Integrated Circuit Design
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ISBN: 9781441966216 Year: 2012 Publisher: New York NY Springer New York

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Uncertainty in key parameters within a chip and between different chips in the deep sub micron era plays a more and more important role. As a result, manufacturing process spreads need to be considered during the design process.  Quantitative methodology is needed to ensure faultless functionality, despite existing process variations within given bounds, during product development.   This book presents the technological, physical, and mathematical fundamentals for a design paradigm shift, from a deterministic process to a probability-orientated design process for microelectronic circuits.  Readers will learn to evaluate the different sources of variations in the design flow in order to establish different design variants, while applying appropriate methods and tools to evaluate and optimize their design.  Trains IC designers to recognize problems caused by parameter variations during manufacturing and to choose the best methods available to mitigate these issues during the design process; Offers both qualitative and quantitative insight into critical effects of process variation from perspectives of manufacturing, electronic design automation and circuit design; Describes critical effects of process variation using simple examples that can be reproduced by the reader.      


Book
Scalable Multi-core Architectures : Design Methodologies and Tools
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ISBN: 9781441967787 Year: 2012 Publisher: New York NY Springer New York

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As Moore's law continues to unfold, two important trends have recently emerged. First, the growth of chip capacity is translated into a corresponding increase of number of cores. Second, the parallalization of the computation and 3D integration technologies lead to distributed memory architectures. This book provides a current snapshot of industrial and academic research, conducted as part of the European FP7 MOSART project, addressing urgent challenges in many-core architectures and application mapping.  It addresses the architectural design of many core chips, memory and data management, power management, design and programming methodologies. It also describes how new techniques have been applied in various industrial case studies. Describes trends towards distributed memory architectures and distributed power management; Integrates Network on Chip with distributed, shared memory architectures; Demonstrates novel design methodologies and frameworks for multi-core design space exploration; Shows how midlleware services (dynamic data management) can be integrated into and support by the platform.    


Book
On-Chip Interconnect with aelite : Composable and Predictable Systems
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ISBN: 9781441968654 Year: 2011 Publisher: New York NY Springer New York Imprint Springer

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On-Chip Interconnect with aelite: Composable and Predictable Systems by: (Authors) Andreas Hansson Kees Goossens Embedded systems are comprised of components integrated on a single circuit, a System on Chip (SoC). One of the critical elements of such an SoC, and the focus of this work, is the on-chip interconnect that enables different components to communicate with each other. The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs. ¢Uses real-world illustrations extensively, in the form of case studies and examples that communicate the power of the methods presented; ¢Uses one consistent, running example throughout the book. This example is introduced in the introductory chapter and supports the presentation throughout the work, with additional details given in each chapter; ¢Content has both breadth (architecture, resource allocation, hardware/software instantiation, formal verification) and depth (block-level architecture description, allocation algorithms, complete run-time APIs, detailed formal models, complete case studies mapped to FPGAs); ¢Includes numerous case studies, e.g. a JPEG decoder, set-top box and digital radio design.


Book
Low Power Networks-on-Chip
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ISBN: 9781441969118 Year: 2011 Publisher: Boston MA Springer US Imprint Springer

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Low Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities, since power and energy issues still represent one of the limiting factors in integrating multi- and many-cores on a single chip. This book covers power and energy aware design techniques from several perspectives and abstraction levels and offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures. ¢Describes the most important design techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in networks-on-chip based architectures; ¢Applies state-of-the-art, low-power design techniques to the design of Networks-on-Chip, to demonstrate methodology for design of high-speed, low-power interconnect; ¢Offers a single source reference to the latest research, otherwise available only in disparate journals and conference proceedings.


Book
Ultra-thin Chip Technology and Applications
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ISBN: 9781441972767 Year: 2011 Publisher: New York NY Springer New York Imprint Springer

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Ultra-thin Chip Technology and Applications edited by: Joachim N. Burghartz Ultra-thin chip technology has the potential to provide solutions for overcoming bottlenecks in silicon technology and for leading to new applications. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, assembly, characterization, modeling and applications of ultra-thin chips. ¢Provides a comprehensive overview of the challenges in ultra-thin chip fabrication, post processing, properties and applications by leaders in the field sharing their newest results and ideas; ¢Compares strengths and weaknesses of three generic fabrication processes for ultra-thin chips; ¢Describes electronic, mechanical, optical, and thermal properties of ultra-thin chips that are different from those of conventional, thick chips; ¢Shows that thin chip technology and its applications represents a new paradigm in silicon technology.


Book
Run-time Adaptation for Reconfigurable Embedded Processors
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ISBN: 9781441974129 Year: 2011 Publisher: New York NY Springer New York

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Run-time Adaptation for Reconfigurable Embedded Processors by: Lars Bauer Jörg Henkel Embedded processors are the heart of embedded systems. Reconfigurable embedded processors comprise an extended instruction set that is implemented using a reconfigurable fabric (similar to a field-programmable gate array, FPGA). This book presents novel concepts, strategies, and implementations to increase the run-time adaptivity of reconfigurable embedded processors. Concepts and techniques are presented in an accessible, yet rigorous context. A complex, realistic H.264 video encoder application with a high demand for adaptivity is presented and used as an example for motivation throughout the book. A novel, run-time system is demonstrated to exploit the potential for adaptivity and particular approaches/algorithms are presented to implement it. ¢Presents a new approach to increase the adaptivity of embedded processors; ¢Describes a novel approach to increasing the adaptivity for reconfigurable processors, explained in a very visual/imaginable manner, as well a very precise/formal manner; ¢Presents a complex, realistic H.264 video encoder application with a high demand for adaptivity and uses that example for motivation/in-depth evaluation throughout the book; ¢Describes a novel run-time system that exploits the potential for adaptivity and particular approaches/algorithms to implement it.


Book
Low-Power Variation-Tolerant Design in Nanometer Silicon
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ISBN: 9781441974181 Year: 2011 Publisher: Boston MA Springer US

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Low-Power Variation-Tolerant Design in Nanometer Silicon Edited by: Swarup Bhunia Saibal Mukhopadhyay Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. Coverage includes logic and memory design, modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. ¢Introduces readers to some of the most important challenges in low-power and variation-tolerant IC design in nanoscale technologies; ¢Presents a holistic view of Low-Power Variation-Tolerant Design, at different levels of design abstraction, starting from device to circuit, architecture and system; ¢Offers comprehensive coverage of modeling, analysis and design methodology for low power and variation-tolerant logic circuits, memory and systems, micro-architecture, DSP, mixed-signal and FPGAs, including current industrial practices, technology scaling trends, and emerging challenges; ¢Describes in detail modeling and analysis of different variation effects (die-to-die and within-die, process and temporal) on low-power designs; Includes coverage of ultra low-power and robust sub-threshold design.

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