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Book
Normally-Off Computing
Authors: ---
Year: 2017 Publisher: Tokyo : Springer Japan : Imprint: Springer,

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Abstract

As a step toward ultimate low-power computing, this book introduces normally-off computing, which involves inactive components of computer systems being aggressively powered off with the help of new non-volatile memories (NVMs). Because the energy consumption of modern information devices strongly depends on both hardware and software, co-design and co-optimization of hardware and software are indispensable to improve energy efficiency. The book discusses various topics including (1) details of low-power technologies including power gating, (2) characteristics of several new-generation NVMs, (3) normally-off computing architecture, (4) important technologies for implementing normally-off computing, (5) three practical implementations: healthcare, mobile information devices, and sensor network systems for smart city applications, and (6) related research and development. Bridging computing methodology and emerging memory devices, the book is designed for both hardware and software designers, engineers, and developers as comprehensive material for understanding normally-off computing.


Book
Proceedings, Third International IEEE Security in Storage Workshop : December 13, 2005, San Francisco, California USA


Book
Storage systems : organization, performance, coding, reliability, and their data processing
Author:
ISBN: 0323908098 9780323908092 9780323907965 0323907962 Year: 2022 Publisher: Waltham, Massachusetts : Elsevier,

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"Storage Systems: Organization, Performance, Coding, Reliability and Their Data Processing was motivated by the 1988 Redundant Array of Inexpensive/Independent Disks proposal to replace large form factor mainframe disks with an array of commodity disks. Disk loads are balanced by striping data into strips—with one strip per disk— and storage reliability is enhanced via replication or erasure coding, which at best dedicates k strips per stripe to tolerate k disk failures. Flash memories have resulted in a paradigm shift with Solid State Drives (SSDs) replacing Hard Disk Drives (HDDs) for high performance applications. RAID and Flash have resulted in the emergence of new storage companies, namely EMC, NetApp, SanDisk, and Purestorage, and a multibillion-dollar storage market. Key new conferences and publications are reviewed in this book. The goal of the book is to expose students, researchers, and IT professionals to the more important developments in storage systems, while covering the evolution of storage technologies, traditional and novel databases, and novel sources of data. We describe several prototypes: FAWN at CMU, RAMCloud at Stanford, and Lightstore at MIT; Oracle's Exadata, AWS' Aurora, Alibaba's PolarDB, Fungible Data Center; and author's paper designs for cloud storage, namely heterogeneous disk arrays and hierarchical RAID."--


Book
Ferroelectric Perovskites for High-Speed Memory
Authors: ---
ISBN: 9789811926693 Year: 2022 Publisher: Singapore Springer Nature Singapore :Imprint: Springer


Book
Computational Neuroscience: Cortical Dynamics : 8th International Summer School on Neural Nets, Erice, Italy, October 31 - November 6, 2003 Revised Lectures
Authors: --- --- --- ---
Year: 2004 Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer,


Book
IEEE standard for Media Management System (MMS) Media Management Protocol (MMP).
Author:
ISBN: 0738125105 0738125113 Year: 2000 Publisher: New York : IEEE,

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Abstract

All relevant behavior and states of the Media Management System (MMS) and the Media Manager (MM) from the time the MMS application successfully establishes a session with the MM, until the session is severed is described. This standard specifies the behavior of the MM itself in response to certain MMP commands and events that occur during the existence of the MM, including but not limited to booting the MM and the un-commanded exit of a MMS client.


Book
IEEE standard for discovery, authentication, and authorization in host attachments of storage devices.
Author:
ISBN: 0738198692 Year: 2016 Publisher: New York : IEEE,


Book
Memristor computing systems
Authors: --- ---
ISBN: 3030905810 3030905829 Year: 2022 Publisher: Cham, Switzerland : Springer,


Book
Multicore systems on-chip : practical software/hardware design
Author:
ISBN: 9491216333 Year: 2010 Publisher: Paris : Atlantis Press,

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Abstract

Conventional on-chip communication design mostly use ad-hoc approaches that fail to meet the challenges posed by the next-generation MultiCore Systems on-chip (MCSoC) designs. These major challenges include wiring delay, predictability, diverse interconnection architectures, and power dissipation. A Network-on-Chip (NoC) paradigm is emerging as the solution for the problems of interconnecting dozens of cores into a single system on-chip. However, there are many problems associated with the design of such systems. These problems arise from non-scalable global wire delays, failure to achieve global synchronization, and difficulties associated with non-scalable bus-based functional interconnects. The book consists of three parts, with each part being subdivided into four chapters. The first part deals with design and methodology issues. The architectures used in conventional methods of MCSoCs design and custom multiprocessor architectures are not flexible enough to meet the requirements of different application domains and not scalable enough to meet different computation needs and different complexities of various applications. Several chapters of the first part will emphasize on the design techniques and methodologies. The second part covers the most critical part of MCSoCs design — the interconnections. One approach to addressing the design methodologies is to adopt the so-called reusability feature to boost design productivity. In the past years, the primitive design units evolved from transistors to gates, finite state machines, and processor cores. The network-on-chip paradigm offers this attractive property for the future and will be able to close the productivity gap. The last part of this book delves into MCSoCs validations and optimizations. A more qualitative approach of system validation is based on the use of formal techniques for hardware design. The main advantage of formal methods is the possibility to prove the validity of essential design requirements. As formal languages have a mathematical foundation, it is possible to formally extract and verify these desired properties of the complete abstract state space. Online testing techniques for identifying faults that can lead to system failure are also surveyed. Emphasis is given to analytical redundancy-based techniques that have been developed for fault detection and isolation in the automatic control area.


Book
3D Flash Memories
Author:
ISBN: 9401775125 9401775109 Year: 2016 Publisher: Dordrecht : Springer Netherlands : Imprint: Springer,

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This book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon. It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology. After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird’s-eye views and cross sections along the 3 axes. The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades. Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective. Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.

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