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After the third and fourth industrial revolutions, engineering and technology have become the pillar of economic development. Automated systems started to replace unskilled workforce. How to design and operate automation equipment had become a new competitive power in the labour market. National Science Foundation (NSF) adopted the new word “STEM” to represent the disciplines of science, technology, engineering, and mathematics. STEM education has raised attention along with science and technology development worldwide. Firstly, this research project gives a short literature review on the tighten skilled labour market situation. Secondly, it comes up with the quantity and quality analysis with a tailored top university ranking selection. This Adjusted STEM top university ranking is based on the weight distribution method. Thirdly, this research project analyses the cost and benefit of introducing the STEM education practices to the EU 28 countries and Switzerland. Fourthly, the discussion section describes the limitations of this research project. Finally, the conclusion section summarizes the findings.

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Our thesis focuses on the implementation of a fully functional wireless digital communications system. We implement a QPSK transceiver for lossless audio. Our work involves creating a modelbased design for the transmitter and receiver in System Generator for DSP. We integrate these functional blocks into a larger digital design to implement the project on a ZedBoard in conjunction with an FMComms1-EBZ board from Analog Devices. The Zynq-7000 system on a chip (SoC) integrates an ARM-based dual-core processor subsystem (PS) and a 28 nm Xilinx programmable logic (PL) in a single device. Our project is a hardware and software integrated project. The transmitter and receiver are implemented on PL of Zynq-7000. We also use the on-board audio codec to playback received pulse code modulated (PCM) audio. We set up an audio buffer to give audio data continuously to the transmitter via a FIFO interface. Data framing and QPSK generate our IQ samples. Then, pulse shaping reduces the baseband signal’s bandwidth. We generate the 16-bit IQ samples at 81.92 MHz, the sampling rate of the DAC. The main functionality of the receiver is timing recovery. Timing recovery synchronizes the symbol timing, generating a symbol clock. Carrier recovery corrects the carrier phase and frequency error. These two techniques make sure the received data is synchronized with transmitted data. Frame synchronization detects the start of frames to recover the PCM audio data. The FMComms1-EBZ board modulates our baseband signal to the carrier frequency of 2.4GHz. It also amplifies the received and transmitted signals. The audio codec is configured to play back the received audio. In the PS of Zynq-7000, we initialise the FMComms1-EBZ board and add networking to send IQ samples over ethernet for debug. In this thesis paper, firstly, we discuss the related basic concepts of wireless communications and FPGAs. Secondly, we explain the design and implementation of the transceiver and audio processing. Thirdly we show our results and discuss the project.