Listing 1 - 10 of 14 | << page >> |
Sort by
|
Choose an application
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.
Embedded computer systems --- Computer architecture. --- Integrated circuits --- Testing. --- Verification. --- Hardware verification --- Integrated circuit verification --- Verification of hardware --- Verification of integrated circuits --- Architecture, Computer --- Embedded systems (Computer systems) --- Computer systems --- Architecture Analysis and Design Language --- Systems engineering. --- Computer science. --- Software engineering. --- Computer aided design. --- Computer system performance. --- Computer engineering. --- Circuits and Systems. --- Processor Architectures. --- Special Purpose and Application-Based Systems. --- Computer-Aided Engineering (CAD, CAE) and Design. --- System Performance and Evaluation. --- Electrical Engineering. --- Computers --- CAD (Computer-aided design) --- Computer-assisted design --- Computer-aided engineering --- Design --- Computer software engineering --- Engineering --- Informatics --- Science --- Engineering systems --- System engineering --- Industrial engineering --- System analysis --- Design and construction --- Electronic circuits. --- Microprocessors. --- Special purpose computers. --- Computer-aided engineering. --- Computer system failures. --- Electrical engineering. --- Electric engineering --- Computer failures --- Computer malfunctions --- Failure of computer systems --- System failures (Engineering) --- Fault-tolerant computing --- CAE --- Special purpose computers --- Minicomputers --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Failures --- Data processing
Choose an application
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains
Systems on a chip. --- Microcomputers --- Computer architecture. --- Interconnects (Integrated circuit technology) --- Buses. --- Integrated circuits --- Interconnections (Integrated circuit technology) --- Architecture, Computer --- Buses (Microcomputers) --- Microbuses (Computers) --- Microcomputer buses --- Bus conductors (Electricity) --- Data transmission systems --- SOC design --- Systems on chip --- Embedded computer systems --- Connections
Choose an application
Efficient design of embedded processors plays a critical role in embedded systems design. Processor description languages and their associated specification, exploration and rapid prototyping methodologies are used to find the best possible design for a given set of applications under various design constraints, such as area, power and performance. This book is the first, comprehensive survey of modern architecture description languages and will be an invaluable reference for embedded system architects, designers, developers, and validation engineers. Readers will see that the use of
Choose an application
Efficient design of embedded processors plays a critical role in embedded systems design. Processor description languages and their associated specification, exploration and rapid prototyping methodologies are used to find the best possible design for a given set of applications under various design constraints, such as area, power and performance. This book is the first, comprehensive survey of modern architecture description languages and will be an invaluable reference for embedded system architects, designers, developers, and validation engineers. Readers will see that the use of particular architecture description languages will lead to productivity gains in designing particular (application-specific) types of embedded processors. * Comprehensive coverage of all modern architecture description languages ... use the right ADL to design your processor to fit your application; * Most up-to-date information available about each architecture description language from the developers ... save time chasing down reliable documentation; * Describes how each architecture desccription language enables key design automation tasks, such as simulation, synthesis and testing ... fit the ADL to your design cycle.
Choose an application
Memory Architecture Exploration for Programmable Embedded Systems addresses efficient exploration of alternative memory architectures, assisted by a "compiler-in-the-loop" that allows effective matching of the target application to the processor-memory architecture. This new approach for memory architecture exploration replaces the traditional black-box view of the memory system and allows for aggressive co-optimization of the programmable processor together with a customized memory system. The book concludes with a set of experiments demonstrating the utility of this exploration approach. The authors perform architecture and compiler exploration for a set of large, real-life benchmarks, uncovering promising memory configurations from different perspectives, such as cost, performance and power.
Computer science. --- Architecture, Computer. --- Computers. --- Computer-aided engineering. --- Electrical engineering. --- Electronic circuits. --- Computer Science. --- Theory of Computation. --- Computer System Implementation. --- Circuits and Systems. --- Computer-Aided Engineering (CAD, CAE) and Design. --- Electrical Engineering. --- Semiconductor storage devices. --- Programmable controllers. --- Automates programmables --- Mémoires à semiconducteurs --- Mémoires à semiconducteurs --- Computer. Automation --- embedded systems --- Computer architecture. --- Embedded computer systems. --- Systèmes enfouis (Informatique) --- Ordinateurs --- Architecture --- EPUB-LIV-FT SPRINGER-B --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Electric engineering --- Engineering --- CAE --- Automatic computers --- Automatic data processors --- Computer hardware --- Computing machines (Computers) --- Electronic brains --- Electronic calculating-machines --- Electronic computers --- Hardware, Computer --- Computer systems --- Cybernetics --- Machine theory --- Calculators --- Cyberspace --- Architecture, Computer --- Informatics --- Science --- Data processing
Choose an application
This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.
Electronic circuits. --- Computer engineering. --- Internet of things. --- Embedded computer systems. --- Microprocessors. --- Circuits and Systems. --- Cyber-physical systems, IoT. --- Processor Architectures. --- Minicomputers --- Embedded systems (Computer systems) --- Computer systems --- Architecture Analysis and Design Language --- IoT (Computer networks) --- Things, Internet of --- Computer networks --- Embedded Internet devices --- Machine-to-machine communications --- Computers --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Design and construction --- Circuits and Systems --- Cyber-physical systems, IoT --- Processor Architectures --- Electronic Circuits and Systems --- Cyber-Physical Systems --- Fault-Tolerant Computing --- Reliability Enhancers in Embedded Systems --- SoCs based on cross-layer-reliability --- System-Level Reliability Analysis --- Dependable Software Execution --- Open access --- Electronics: circuits & components --- Electrical engineering --- Cybernetics & systems theory --- Computer architecture & logic design
Choose an application
Electronics --- Electrical engineering --- Computer architecture. Operating systems --- Computer. Automation --- microprocessoren --- algoritmen --- architectuur (informatica) --- elektrische circuits
Choose an application
Choose an application
Integrated circuits --- Silicon compilers --- Very large scale integration --- Computer-aided design --- Very large scale integration of circuits --- VLSI circuits --- Compilation, Silicon --- Compilers, Silicon --- Silicon compilation --- Compilers (Computer programs) --- Very large scale integration. --- Chips (Electronics) --- Circuits, Integrated --- Computer chips --- Microchips --- Electronic circuits --- Microelectronics --- Very large scale integration&delete& --- Integrated circuits - Very large scale integration - Computer-aided design
Choose an application
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect's knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.
Electronics --- Electrical engineering --- Programming --- Computer architecture. Operating systems --- Artificial intelligence. Robotics. Simulation. Graphics --- Computer. Automation --- embedded systems --- informatica --- computerbesturingssystemen --- elektronica --- KI (kunstmatige intelligentie) --- CAD (computer aided design) --- architectuur (informatica) --- elektrische circuits
Listing 1 - 10 of 14 | << page >> |
Sort by
|