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This Special Issue aims to examine high-density solid-state memory devices and technologies from various standpoints in an attempt to foster their continuous success in the future. Considering that broadening of the range of applications will likely offer different types of solid-state memories their chance in the spotlight, the Special Issue is not focused on a specific storage solution but rather embraces all the most relevant solid-state memory devices and technologies currently on stage. Even the subjects dealt with in this Special Issue are widespread, ranging from process and design issues/innovations to the experimental and theoretical analysis of the operation and from the performance and reliability of memory devices and arrays to the exploitation of solid-state memories to pursue new computing paradigms.

resistive switching memory --- in-memory computing --- crosspoint array --- artificial intelligence --- deep learning --- dielectric --- RTN --- TAT --- Wiener–Khinchin --- transient analysis --- phonon --- surface roughness --- spectral index --- power spectrum --- program suspend --- 3D NAND Flash --- Solid State Drives --- MOSFET --- low-frequency noise --- random telegraph noise --- evaluation method --- array test pattern --- STT-MRAM --- spintronics --- CoFeB --- composite free layer --- low power electronics --- NAND Flash memory --- endurance --- reliability --- oxide trapped charge --- artificial neural networks --- neuromorphic computing --- NOR Flash memory arrays --- program noise --- pulse-width modulation --- 3D NAND --- floating gate cell --- charge-trap cell --- CMOS under array --- bumpless --- TSV --- WOW --- COW --- BBCube --- bandwidth --- yield --- power consumption --- thermal management --- n/a --- Wiener-Khinchin

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Computing systems are undergoing a transformation from logic-centric towards memory-centric architectures, where overall performance and energy efficiency at the system level are determined by the density, performance, functionality and efficiency of the memory, rather than the logic sub-system.

n/a --- image classification --- bipolar resistive switching characteristics --- bioelectronic devices --- self-directed channel (SDC) --- programmable ramp-down current pulses --- nanoparticles --- protein --- DRAM --- convolutional neural networks --- silicon oxide-based memristors --- electrochemical metallization cell --- magnetic tunnel junction --- power gating --- resistance switching mechanism --- BCH --- Fast Fourier Transform --- nucleic acid --- biomemory --- conductive filament --- resistive random access memory (RRAM) --- non-von Neumann architecture --- emerging technologies --- Galois field --- variability --- logic-in-memory --- charge spreading --- memristor --- Hebbian training --- crossbar --- quantum point contact --- SONOS --- bionanohybrid material --- ECG --- neuromorphic computing --- CUDA --- low-latency --- iBM --- Oxygen-related trap --- nonvolatile memory --- phase change memory --- floating gate --- non-von neumann architecture --- 3D-stacked --- STT-MRAM --- solution-based dielectric --- GPU --- Internet of things --- configurable logic-in-memory architecture --- memory wall --- biologic gate --- synaptic weight --- guide training --- ion conduction --- perpendicular Nano Magnetic Logic (pNML) --- Weibull distribution --- real-time system --- in-DRAM cache --- task placement --- dynamic voltage scaling --- MCU (microprogrammed control unit) --- wire resistance --- multi-level cell --- chalcogenide --- decoder --- character recognition --- matrix-vector multiplication --- hybrid --- magnetoresistive random access memory --- blockchain --- electrochemical metallization (ECM) --- RISC-V --- U-shape recessed channel --- neuromorphic system --- in-memory computing --- crossbar array --- associative processor --- low-power --- plasma treatment --- voltage-controlled magnetic anisotropy --- flash memory --- resistive memory --- analogue computing --- bioprocessor --- annealing temperatures --- data retention --- flip-flop --- low-power technique