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Listing 1 - 9 of 9
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Book
Ultra-reliable low-latency communications : foundations, enablers, system design, and evolution towards 6G
Authors: --- --- ---
ISBN: 1638281815 Year: 2023 Publisher: Norwell, MA : Now Publishers,

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This is the first book to give the reader a complete, yet concise, introduction to the theoretical and application oriented aspects of a topic at the core of both 5G and 6G wireless communication systems. As such, it is essential reading for designers and students of such systems.


Multi
Artificial Self-recovery and Autonomous Health of Machine
Authors: ---
ISBN: 9789811945144 9789811945137 9789811945151 9789811945168 Year: 2023 Publisher: Singapore Springer Nature Singapore :Imprint: Springer

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This book explores the research fields of engineering cybernetics, bionics, artificial self-recovery and engineering self-recoveries. It explains the scientific and technological research results of artificial self-recovery, autonomous health technology and the application cases of assisted rehabilitation and autonomous health engineering. It provides guidance, latest research trends and development direction for researchers, scholars and engineers engaged in mechanical equipment fault diagnosis and autonomous health. .


Book
Functional safety for embedded systems
Author:
ISBN: 1003391516 1003391516 1000881318 9781003391517 9781032489360 9781032489384 9781000881318 Year: 2023 Publisher: Boca Raton, FL : CRC Press,

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"This book uses automotive embedded systems as an example to introduce functional safety assurance and safety-aware cost optimization. The book explores functional safety assurance from the perspectives of verification, enhancement, and validation. The functional safety assurance methods implement a safe and efficient assurance system that integrates safety verification, enhancement, and validation. The assurance methods offered in this book could provide a reasonable and scientific theoretical basis for the subsequent formulation of automotive functional safety standards. The safety-aware cost optimization methods divide cost types according to the essential differences of various costs in system design and establish reasonable models based on different costs. The cost optimization methods provided in this book could give appropriate cost optimization solutions for the cost-sensitive automotive industry, thereby achieving effective cost management and control. Functional safety assurance methods and safety-aware cost optimization support each other and jointly build the architecture of functional safety design methodologies for automotive embedded systems. The work aspires to provide a relevant reference for students, researchers, engineers, and professionals working in this area or those interested in hardware cost optimization and development cost optimization design methods based on ensuring functional safety in general"--


Book
Advances in delay-tolerant networks (DTNs) : architecture and enhanced performance
Author:
ISBN: 008102794X 0081027931 9780081027943 9780081027936 Year: 2021 Publisher: Duxford, UK : Woodhead Publishing,

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Advances in Delay-Tolerant Networks: Architecture and Enhanced Performance, Second Edition provides an important overview of delay-tolerant networks (DTNs) for researchers in electronics, computer engineering, telecommunications and networking for those in academia and R&D in industrial sectors. Part I reviews the technology involved and the prospects for improving performance, including different types of DTN and their applications, such as satellite and deep-space communications and vehicular communications. Part II focuses on how the technology can be further improved, addressing topics, such as data bundling, opportunistic routing, reliable data streaming, and the potential for rapid selection and dissemination of urgent messages. Opportunistic, delay-tolerant networks address the problem of intermittent connectivity in a network where there are long delays between sending and receiving messages, or there are periods of disconnection.


Book
The Datacenter as a Computer : Designing Warehouse-Scale Machines, Third Edition
Authors: --- ---
ISBN: 3031017617 3031000587 303100633X Year: 2019 Publisher: Cham : Springer International Publishing : Imprint: Springer,

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This book describes warehouse-scale computers (WSCs), the computing platforms that power cloud computing and all the great web services we use every day. It discusses how these new systems treat the datacenter itself as one massive computer designed at warehouse scale, with hardware and software working in concert to deliver good levels of internet service performance. The book details the architecture of WSCs and covers the main factors influencing their design, operation, and cost structure, and the characteristics of their software base. Each chapter contains multiple real-world examples, including detailed case studies and previously unpublished details of the infrastructure used to power Google's online services. Targeted at the architects and programmers of today's WSCs, this book provides a great foundation for those looking to innovate in this fascinating and important area, but the material will also be broadly interesting to those who just want to understand the infrastructure powering the internet. The third edition reflects four years of advancements since the previous edition and nearly doubles the number of pictures and figures. New topics range from additional workloads like video streaming, machine learning, and public cloud to specialized silicon accelerators, storage and network building blocks, and a revised discussion of data center power and cooling, and uptime. Further discussions of emerging trends and opportunities ensure that this revised edition will remain an essential resource for educators and professionals working on the next generation of WSCs.


Book
Built-in fault-tolerant computing paradigm for resilient large-scale chip design : a self-test, self-diagnosis, and self-repair-based approach
Authors: --- ---
ISBN: 9811985510 9811985502 Year: 2023 Publisher: Gateway East, Singapore : Springer,

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With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-purpose processors, network-on-chip (NoC) and deep learning accelerators, and present prototypes to demonstrate how 3S responds to in-field silicon degradation and recovery under various runtime faults caused by aging, process variations, or radical particles. Moreover, we demonstrate that 3S not only offers a powerful backbone for various on-chip fault-tolerant designs and implementations, but also has farther-reaching implications such as maintaining graceful performance degradation, mitigating the impact of verification blind spots, and improving chip yield. This book is the outcome of extensive fault-tolerant computing research pursued at the State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences over the past decade. The proposed built-in on-chip fault-tolerant computing paradigm has been verified in a broad range of scenarios, from small processors in satellite computers to large processors in HPCs. Hopefully, it will provide an alternative yet effective solution to the growing reliability challenges for large-scale VLSI designs. .


Book
High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
Authors: ---
ISBN: 9811010730 9811010722 Year: 2018 Publisher: Singapore : Springer Singapore : Imprint: Springer,

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This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. .


Book
Fault Tolerant Architectures for Cryptography and Hardware Security
Authors: ---
ISBN: 981101387X 9811013861 Year: 2018 Publisher: Singapore : Springer Singapore : Imprint: Springer,

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This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods. It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results.

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