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This is the first book to give the reader a complete, yet concise, introduction to the theoretical and application oriented aspects of a topic at the core of both 5G and 6G wireless communication systems. As such, it is essential reading for designers and students of such systems.
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This book explores the research fields of engineering cybernetics, bionics, artificial self-recovery and engineering self-recoveries. It explains the scientific and technological research results of artificial self-recovery, autonomous health technology and the application cases of assisted rehabilitation and autonomous health engineering. It provides guidance, latest research trends and development direction for researchers, scholars and engineers engaged in mechanical equipment fault diagnosis and autonomous health. .
Mechanical properties of solids --- Applied physical engineering --- patroonherkenning --- fabrieken --- superclaus proces --- toegepaste mechanica --- optica --- Artificial intelligence. --- Fault location (Engineering) --- Fault tolerance (Engineering)
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"This book uses automotive embedded systems as an example to introduce functional safety assurance and safety-aware cost optimization. The book explores functional safety assurance from the perspectives of verification, enhancement, and validation. The functional safety assurance methods implement a safe and efficient assurance system that integrates safety verification, enhancement, and validation. The assurance methods offered in this book could provide a reasonable and scientific theoretical basis for the subsequent formulation of automotive functional safety standards. The safety-aware cost optimization methods divide cost types according to the essential differences of various costs in system design and establish reasonable models based on different costs. The cost optimization methods provided in this book could give appropriate cost optimization solutions for the cost-sensitive automotive industry, thereby achieving effective cost management and control. Functional safety assurance methods and safety-aware cost optimization support each other and jointly build the architecture of functional safety design methodologies for automotive embedded systems. The work aspires to provide a relevant reference for students, researchers, engineers, and professionals working in this area or those interested in hardware cost optimization and development cost optimization design methods based on ensuring functional safety in general"--
Embedded computer systems --- Automatic control --- Automotive computers --- Fault-tolerant computing. --- Fault tolerance (Engineering) --- Reliability. --- Safety measures. --- Fault-tolerant computing --- Reliability --- Safety measures
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Advances in Delay-Tolerant Networks: Architecture and Enhanced Performance, Second Edition provides an important overview of delay-tolerant networks (DTNs) for researchers in electronics, computer engineering, telecommunications and networking for those in academia and R&D in industrial sectors. Part I reviews the technology involved and the prospects for improving performance, including different types of DTN and their applications, such as satellite and deep-space communications and vehicular communications. Part II focuses on how the technology can be further improved, addressing topics, such as data bundling, opportunistic routing, reliable data streaming, and the potential for rapid selection and dissemination of urgent messages. Opportunistic, delay-tolerant networks address the problem of intermittent connectivity in a network where there are long delays between sending and receiving messages, or there are periods of disconnection.
Computer networks --- Fault-tolerant computing. --- Communication systems, Computer --- Computer communication systems --- Data networks, Computer --- ECNs (Electronic communication networks) --- Electronic communication networks --- Networks, Computer --- Teleprocessing networks --- Data transmission systems --- Digital communications --- Electronic systems --- Information networks --- Telecommunication --- Cyberinfrastructure --- Electronic data processing --- Network computers --- Computing, Fault-tolerant --- Electronic digital computers --- Fault tolerance (Engineering) --- Computer system failures --- Reliability. --- Distributed processing --- Reliability
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This book describes warehouse-scale computers (WSCs), the computing platforms that power cloud computing and all the great web services we use every day. It discusses how these new systems treat the datacenter itself as one massive computer designed at warehouse scale, with hardware and software working in concert to deliver good levels of internet service performance. The book details the architecture of WSCs and covers the main factors influencing their design, operation, and cost structure, and the characteristics of their software base. Each chapter contains multiple real-world examples, including detailed case studies and previously unpublished details of the infrastructure used to power Google's online services. Targeted at the architects and programmers of today's WSCs, this book provides a great foundation for those looking to innovate in this fascinating and important area, but the material will also be broadly interesting to those who just want to understand the infrastructure powering the internet. The third edition reflects four years of advancements since the previous edition and nearly doubles the number of pictures and figures. New topics range from additional workloads like video streaming, machine learning, and public cloud to specialized silicon accelerators, storage and network building blocks, and a revised discussion of data center power and cooling, and uptime. Further discussions of emerging trends and opportunities ensure that this revised edition will remain an essential resource for educators and professionals working on the next generation of WSCs.
Cloud computing. --- Fault-tolerant computing. --- Computing, Fault-tolerant --- Electronic data processing --- Electronic digital computers --- Fault tolerance (Engineering) --- Computer system failures --- Web services --- Reliability --- Distributed processing --- Electronic circuits. --- Microprocessors. --- Computer architecture. --- Electronic Circuits and Systems. --- Processor Architectures. --- Architecture, Computer --- Minicomputers --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics
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With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-purpose processors, network-on-chip (NoC) and deep learning accelerators, and present prototypes to demonstrate how 3S responds to in-field silicon degradation and recovery under various runtime faults caused by aging, process variations, or radical particles. Moreover, we demonstrate that 3S not only offers a powerful backbone for various on-chip fault-tolerant designs and implementations, but also has farther-reaching implications such as maintaining graceful performance degradation, mitigating the impact of verification blind spots, and improving chip yield. This book is the outcome of extensive fault-tolerant computing research pursued at the State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences over the past decade. The proposed built-in on-chip fault-tolerant computing paradigm has been verified in a broad range of scenarios, from small processors in satellite computers to large processors in HPCs. Hopefully, it will provide an alternative yet effective solution to the growing reliability challenges for large-scale VLSI designs. .
Computers. --- Microprocessors. --- Computer architecture. --- Hardware Performance and Reliability. --- Computer Hardware. --- Processor Architectures. --- Architecture, Computer --- Minicomputers --- Automatic computers --- Automatic data processors --- Computer hardware --- Computing machines (Computers) --- Electronic brains --- Electronic calculating-machines --- Electronic computers --- Hardware, Computer --- Computer systems --- Cybernetics --- Machine theory --- Calculators --- Cyberspace --- Fault-tolerant computing. --- Integrated circuits --- Masks --- Computing, Fault-tolerant --- Electronic data processing --- Electronic digital computers --- Fault tolerance (Engineering) --- Computer system failures --- Reliability
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Control theory. --- Computer system failures --- Fault-tolerant computing. --- Teoria de control --- Tolerància als errors (Informàtica) --- Prevention. --- Resistència als errors (Informàtica) --- Tolerància a les errades (Computació) --- Processament de dades --- Control (Matemàtica) --- Control òptim --- Regulació --- Anàlisi de sistemes --- Teoria de màquines --- Control automàtic --- Filtre de Kalman --- Sistemes de control biològic --- Computing, Fault-tolerant --- Electronic data processing --- Electronic digital computers --- Fault tolerance (Engineering) --- Computer failures --- Computer malfunctions --- Computer systems --- Failure of computer systems --- System failures (Engineering) --- Fault-tolerant computing --- Dynamics --- Machine theory --- Reliability --- Failures
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This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. .
Engineering. --- Computer software --- Electronic circuits. --- Circuits and Systems. --- Performance and Reliability. --- Electronic Circuits and Devices. --- Reusability. --- Electron-tube circuits --- Reusability of software --- Reusable code (Computer programs) --- Software reusability --- Construction --- Systems engineering. --- Operating systems (Computers). --- Computer operating systems --- Computers --- Disk operating systems --- Systems software --- Engineering systems --- System engineering --- Engineering --- Industrial engineering --- System analysis --- Operating systems --- Design and construction --- Systems on a chip. --- Fault-tolerant computing. --- Computing, Fault-tolerant --- Electronic data processing --- Electronic digital computers --- Fault tolerance (Engineering) --- Computer system failures --- SOC design --- Systems on chip --- Embedded computer systems --- Reliability --- Computer software—Reusability. --- Electric circuits --- Electron tubes --- Electronics
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This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods. It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results.
Fault-tolerant computing. --- Computer security. --- Engineering. --- Data encryption (Computer science). --- System safety. --- Electronic circuits. --- Circuits and Systems. --- Data Encryption. --- Security Science and Technology. --- Electron-tube circuits --- Electric circuits --- Electron tubes --- Electronics --- Safety, System --- Safety of systems --- Systems safety --- Accidents --- Industrial safety --- Systems engineering --- Data encoding (Computer science) --- Encryption of data (Computer science) --- Computer security --- Cryptography --- Construction --- Industrial arts --- Technology --- Prevention --- Computer privacy --- Computer system security --- Computer systems --- Computers --- Cyber security --- Cybersecurity --- Electronic digital computers --- Protection of computer systems --- Security of computer systems --- Data protection --- Security systems --- Hacking --- Computing, Fault-tolerant --- Electronic data processing --- Fault tolerance (Engineering) --- Computer system failures --- Protection --- Security measures --- Reliability --- Systems engineering. --- Cryptology. --- Engineering systems --- System engineering --- Engineering --- Industrial engineering --- System analysis --- Design and construction
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