TY - BOOK ID - 5453960 TI - Creating assertion-based verification IP AU - Foster, Harry AU - Krolnik, Adam. PY - 2007 SN - 1281133981 9786611133986 0387683984 0387366415 1441942181 PB - New York : Springer, DB - UniCat KW - Integrated circuits KW - Electrical engineering. KW - Verification. KW - Electric engineering KW - Hardware verification KW - Integrated circuit verification KW - Verification of hardware KW - Verification of integrated circuits KW - Engineering. KW - Computer-aided engineering. KW - Electronic circuits. KW - Circuits and Systems. KW - Computer-Aided Engineering (CAD, CAE) and Design. KW - Electrical Engineering. KW - Engineering KW - Systems engineering. KW - Computer aided design. KW - Computer engineering. KW - Computers KW - Engineering systems KW - System engineering KW - Industrial engineering KW - System analysis KW - CAD (Computer-aided design) KW - Computer-assisted design KW - Computer-aided engineering KW - Design KW - Design and construction KW - CAE KW - Electron-tube circuits KW - Electric circuits KW - Electron tubes KW - Electronics KW - Data processing UR - https://www.unicat.be/uniCat?func=search&query=sysid:5453960 AB - Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure. The guiding principles promoted in this book when creating an assertion-based IP monitor are: modularity—assertion-based IP should have a clear separation between detection and action clarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations) A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors’ experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers. From the Foreword: Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come." Andrew Piziali, Sr. Design Verification Engineer Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology Author, Functional Verification Coverage Measurement and Analysis. ER -