TY - THES ID - 2836393 TI - Assignment and scheduling of DSP applications on heterogeneous multiprocessors AU - Bilsen, Greet AU - Katholieke Universiteit Leuven PY - 1996 SN - 9056820311 PB - Heverlee Katholieke Universiteit Leuven. Faculteit der Toegepaste Wetenschappen. Departement Elektrotechniek DB - UniCat KW - Proefschriften KW - Thèses KW - Academic collection KW - #BIBC:T1996 KW - #TELE:ACCA KW - 681.3*C12 KW - 681.3*C3 KW - Multiple data stream architectures (multiprocessors): MIMD; SIMD; pipeline and parallel processors; array-, vector-, associative processors; interconnection architectures: common bus, multiport memory, crossbar switch KW - Special-purpose and application-based systems: microprocessor/microcomputer; process control-, real-time, signal processing systems (Computer systems organization)--See also {681.3*J7} KW - Theses KW - 681.3*C3 Special-purpose and application-based systems: microprocessor/microcomputer; process control-, real-time, signal processing systems (Computer systems organization)--See also {681.3*J7} KW - 681.3*C12 Multiple data stream architectures (multiprocessors): MIMD; SIMD; pipeline and parallel processors; array-, vector-, associative processors; interconnection architectures: common bus, multiport memory, crossbar switch UR - https://www.unicat.be/uniCat?func=search&query=sysid:2836393 AB - ER -