TY - BOOK ID - 17306113 TI - Concurrency and Hardware Design : Advances in Petri Nets AU - Cortadella, Jordi. AU - Yakovlev, Alex. AU - Rozenberg, Grzegorz. PY - 2002 VL - 2549 SN - 3540001999 9783540001997 3540361901 PB - Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, DB - UniCat KW - Parallel processing (Electronic computers) KW - Electronic digital computers KW - Petri nets KW - Design and construction KW - Petri nets. KW - Design and construction. KW - Computer science. KW - Computer hardware. KW - Computer organization. KW - Software engineering. KW - Computers. KW - Mathematical logic. KW - Computer Science. KW - Software Engineering/Programming and Operating Systems. KW - Computer Hardware. KW - Computer Systems Organization and Communication Networks. KW - Software Engineering. KW - Computation by Abstract Devices. KW - Mathematical Logic and Formal Languages. KW - Algebra of logic KW - Logic, Universal KW - Mathematical logic KW - Symbolic and mathematical logic KW - Symbolic logic KW - Mathematics KW - Algebra, Abstract KW - Metamathematics KW - Set theory KW - Syllogism KW - Automatic computers KW - Automatic data processors KW - Computer hardware KW - Computing machines (Computers) KW - Electronic brains KW - Electronic calculating-machines KW - Electronic computers KW - Hardware, Computer KW - Computer systems KW - Cybernetics KW - Machine theory KW - Calculators KW - Cyberspace KW - Computer software engineering KW - Engineering KW - Organization, Computer KW - Informatics KW - Science KW - High performance computing KW - Multiprocessors KW - Parallel programming (Computer science) KW - Supercomputers KW - Graph theory KW - Nets (Mathematics) KW - Computer network architectures. KW - Architectures, Computer network KW - Network architectures, Computer KW - Computer architecture KW - Electronic digital computers - Design and construction KW - Logic, Symbolic and mathematical. UR - https://www.unicat.be/uniCat?func=search&query=sysid:17306113 AB - As CMOS semiconductor technology strides towards billions of transistors on a single die new problems arise on the way. They are concerned with the - minishing fabrication process features, which a?ect for example the gate-to-wire delay ratio. They manifest themselves in greater variations of size and operating parameters of devices, which put the overall reliability of systems at risk. And, most of all, they have tremendous impact on design productivity, where the costs of utilizing the growing silicon ‘real estate’ rocket to billions of dollars that have to be spent on design, veri?cation, and testing. All such problems call for new - sign approaches and models for digital systems. Furthermore, new developments in non-CMOS technologies, such as single-electron transistors, rapid single-?- quantum devices, quantum dot cells, molecular devices, etc. , add extra demand for new research in system design methodologies. What kind of models and design methodologies will be required to build systems in all these new technologies? Answering this question, even for each particular type of new technology generation, is not easy, especially because sometimes it is not even clear what kind of elementary devices are feasible there. This problem is of an interdisciplinary nature. It requires an bridges between di?erent scienti?c communities. The bridges must be built very quickly, and be maximally ?exible to accommodate changes taking place in a logarithmic timescale. ER -