TY - BOOK ID - 14220709 TI - Smart multicore embedded systems PY - 2014 SN - 1461487994 1461488001 PB - New York : Springer, DB - UniCat KW - Computer science. KW - Electronics. KW - Engineering. KW - Systems engineering. KW - Engineering systems KW - System engineering KW - Construction KW - Informatics KW - Design and construction KW - Microprocessors. KW - Microelectronics. KW - Electronic circuits. KW - Circuits and Systems. KW - Processor Architectures. KW - Electronics and Microelectronics, Instrumentation. KW - Industrial arts KW - Technology KW - Electrical engineering KW - Physical sciences KW - Electron-tube circuits KW - Electric circuits KW - Electron tubes KW - Electronics KW - Microminiature electronic equipment KW - Microminiaturization (Electronics) KW - Microtechnology KW - Semiconductors KW - Miniature electronic equipment KW - Minicomputers KW - Engineering KW - Industrial engineering KW - System analysis KW - Science KW - Parallel programming (Computer science) KW - Embedded computer systems KW - Multiprocessors. KW - Parallel processing (Electronic computers) KW - Design and construction. UR - https://www.unicat.be/uniCat?func=search&query=sysid:14220709 AB - This book provides a single-source reference to the state-of-the-art of high-level programming models and compilation tool-chains for embedded system platforms. The authors address challenges faced by programmers developing software to implement parallel applications in embedded systems, where very often they are forced to rewrite sequential programs into parallel software, taking into account all the low level features and peculiarities of the underlying platforms. Readers will benefit from these authors’ approach, which takes into account both the application requirements and the platform specificities of various embedded systems from different industries. Parallel programming tool-chains are described that take as input parameters both the application and the platform model, then determine relevant transformations and mapping decisions on the concrete platform, minimizing user intervention and hiding the difficulties related to the correct and efficient use of memory hierarchy and low level code generation. ER -