TY - BOOK ID - 1100935 TI - Graph reduction : proceedings of a workshop Santa Fé, New Mexico, September 29-October 1, 1986 AU - Fasel, Joseph H. AU - Keller, Robert M. PY - 1987 VL - vol 279 SN - 3540184201 0387184201 3540479635 PB - Berlin London Tokyo Springer DB - UniCat KW - Computer science KW - 681.3*C1 KW - 681.3*D11 KW - 681.3*D34 KW - 681.3*F11 KW - 681.3*F41 KW - Processor architectures (Computer systems organization) KW - Applicative (functional) programming KW - Processors: code generation; compilers; interpreters; optimization; parsing; preprocessors; run-time environments; translator writing systems and compilergenerators (Programming languages) KW - Models of computation: automata; bounded action devices; computability theory; relations among models; self-modifying machines; unbounded-action devices--See also {681.3*F41} KW - Mathematical logic: computability theory; computational logic; lambda calculus; logic programming; mechanical theorem proving; model theory; proof theory;recursive function theory--See also {681.3*F11}; {681.3*I22}; {681.3*I23} KW - 681.3*F41 Mathematical logic: computability theory; computational logic; lambda calculus; logic programming; mechanical theorem proving; model theory; proof theory;recursive function theory--See also {681.3*F11}; {681.3*I22}; {681.3*I23} KW - 681.3*F11 Models of computation: automata; bounded action devices; computability theory; relations among models; self-modifying machines; unbounded-action devices--See also {681.3*F41} KW - 681.3*D34 Processors: code generation; compilers; interpreters; optimization; parsing; preprocessors; run-time environments; translator writing systems and compilergenerators (Programming languages) KW - 681.3*D11 Applicative (functional) programming KW - 681.3*C1 Processor architectures (Computer systems organization) KW - Mathematics. KW - Computer network architectures. KW - Computer science. KW - Mathematics, general. KW - Computer System Implementation. KW - Computation by Abstract Devices. KW - Mathematical Logic and Formal Languages. KW - Processor Architectures. KW - Programming Techniques. KW - Informatics KW - Science KW - Architectures, Computer network KW - Network architectures, Computer KW - Computer architecture KW - Math UR - https://www.unicat.be/uniCat?func=search&query=sysid:1100935 AB - This volume describes recent research in graph reduction and related areas of functional and logic programming, as reported at a workshop in 1986. The papers are based on the presentations, and because the final versions were prepared after the workshop, they reflect some of the discussions as well. Some benefits of graph reduction can be found in these papers: - A mathematically elegant denotational semantics - Lazy evaluation, which avoids recomputation and makes programming with infinite data structures (such as streams) possible - A natural tasking model for fine-to-medium grain parallelism. The major topics covered are computational models for graph reduction, implementation of graph reduction on conventional architectures, specialized graph reduction architectures, resource control issues such as control of reduction order and garbage collection, performance modelling and simulation, treatment of arrays, and the relationship of graph reduction to logic programming. ER -