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Field programmable gate arrays

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Aggressive pipelining allows FPGAs to achieve high throughput on many Digital Signal Processing applications. However, cyclic data dependencies in the computation can limit pipelining and reduce the efficiency and speed of an FPGA implementation. Saturated accumulation is an important example where such a cycle limits the throughput of signal processing applications. We show how to reformulate saturated addition as an associative operation so that we can use a parallel-prefix calculation to perform saturated accumulation at any data rate supported by the device. This allows us, for example, to design a 16-bit saturated accumulator which can operate at 280MHz on a Xilinx Spartan-3 (XC3S-5000-4), the maximum frequency supported by the component's DCM.

Field programmable gate arrays

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ICFPT is the premier conference in the Asia Pacific region on field programmable technologies including reconfigurable computing devices and systems containing such components.

Field programmable gate arrays

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Field programmable gate arrays

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Field programmable gate arrays --- Programmable array logic